1. Field of the Invention
Embodiments of the invention pertain to semiconductor device fabrication, and in particular to spacers formed around gate structures.
2. Related Technology
Spacers are used for a number of purposes during MOSFET fabrication. FIGS. 1a and 1b illustrate one example in which a gate spacer is used to mask portions of MOSFET source and drain regions during implantation of shallow source and drain extensions. As shown in cross-section in FIG. 1a, a conventional MOSFET gate structure comprised of a gate line 10 and gate insulator 12 is formed on a semiconductor substrate 14. A low energy dopant implant is performed to form shallow source and drain extensions 16. Subsequently, a conformal layer of a conventional spacer material such as silicon oxide or silicon nitride is formed over the gate structure and surrounding regions, and is then anisotropically etched to leave a spacer 18 as shown in FIG. 1b. After the spacer is formed, a high energy dopant implant is performed to form deep source and drain regions 20. The spacer serves to mask the end portions of the shallow source and drain extensions 16 from further implantation.
FIG. 2 shows an example of a second type of spacer structure that is typically referred to as an “L-shaped” spacer. The L-shaped spacer is formed by initially forming a thin conformal layer of a conventional spacer material such as silicon oxide or silicon nitride over a gate structure. The L-shaped spacer is then patterned from the thin layer of spacer material using a photoresist mask as an etch mask during an anisotropic etch to remove unmasked portions. The resulting L-shaped spacer 22 has tail portions 24 that extend outward from the gate and protect a portion of the underlying source and drain regions. The L-shaped spacer may be used for protecting shallow source and drain extensions in the manner shown in FIGS. 1a and 1b. The L-shaped spacer is preferred in some applications because the tail portion may be implanted through to adjust the doping of underlying regions. The L-shaped spacer is also preferable in dense architectures because it occupies relatively little space around the gate and therefore leaves more room when depositing interlevel dielectric.
Irrespective of which type of spacer is used, the spacer is typically left in place during subsequent silicidation of the source and drain regions to prevent shorting between the gate line and the suicides of the source and drain regions.
The conventional spacer structures entail a number of disadvantages. One disadvantage is that the etches used to pattern the spacers may be destructive of the underlying substrate, necessitating the use of a thick protective layer if the spacer is to be removed. This limits the manner in which spacers are currently used. For example, while it would be advantageous to implant shallow source and drain extensions after annealing of deep source and drain regions so as to prevent diffusion of dopant from the shallow extensions into the substrate during annealing, to do so would require formation of the deep regions, followed by removal of the spacer, and then formation of the shallow regions. However, the etching required to remove the spacer consumes a portion of the substrate in which the deep source and drain regions are formed, and therefore alters the physical dimensions of the deep source and drain regions. Similarly, it may be desirable in some implementations to use a thick spacer for source and drain implantation and a thinner spacer during silicidation, but again the potential loss of substrate during removal of the first spacer makes such processing undesirable. In either instance, the additional processing required to form and later remove protective layers unduly complicates the fabrication process.